The workshop series on Embedded Machine Learning (WEML) is hosted by the Center for Applied AI in Duisburg (ZaKI.D), the Intelligent Embedded Systems (IES) Lab at the University of Duisburg-Essen, and co-organized by the Hardware and Artificial Intelligence (HAWAII) Lab at Heidelberg University, Graz University of Technology and Materials Center Leoben GmbH. Our shared interest is to bring complex machine learning models and methods to resource-constrained devices. These include edge devices, embedded systems, and the Internet of Things (IoT). The workshop is informal and has no formal proceedings. It is organized around invited talks on topics related to this research area.
With embedded, we refer to embedded ML into real-world applications, thus operating under conditions that include:
Limited resources in terms of compute, memory, and power consumption
Noisy and incomplete training data, as well as noisy sensor data
Part of a complex system architecture
Topics of interest include in general:
Compression techniques for embedded ML, e.g., quantization, pruning, and knowledge distillation
Techniques for hardware-aware neural architecture search
Hardware support for novel ML architectures beyond CNNs, e.g., Transformer models, LLMs
Techniques for learning ML models in hardware, including federated and continuous learning
Trading among application metrics (accuracy, error) and hardware costs / complexity (memory footprint, latency, resources)
Techniques / Tools for compiling ML models from high-level descriptions to hardware targets (including optimization feedback)
Difficulties and opportunities using common ML frameworks with marginally supported devices
Exploring new ML models designed to be used on designated device hardware
Future emerging processors and computing technologies, e.g., RISC-V, embedded FPGAs, In-Memory Computing, Analogue Computing, Photonic Computing
Applications and experiences from deployed use cases requiring embedded ML
New and emerging applications that require the use of ML on resource-constrained hardware
Probabilistic ML for embedded systems: training, compression, approximation, and efficient hardware mapping
Deployment of an end-to-end AI processing pipeline into real hardware and applications
Optimization techniques to unroll embedded ML in resource-constrained environments
Performance evaluation and benchmarking of ML accelerators on embedded and edge workloads
In this regard, the workshop aims to gather experts from various domains and from both academia and industry to stimulate discussions on recent advances in this area.
09:00 - 09:30 - Guided tour of the IES Lab [Google Maps]
09:30 - 10:00 - Walk to the Fraunhofer inHaus Center (1,4 km)
10:00 - 16:00 - WEML Workshop at the Fraunhofer inHaus Center [Google Maps]
This is an in-person event, and seating is limited. We will do our best to accommodate as many requests as possible. With regard to attending:
If you would like to attend, please complete the registration form: [Registration Form]
As the number of requests may exceed available seats, we kindly ask you to briefly indicate your motivation for attending (field “motivation”).
For planning purposes, we would appreciate it if you could register as early as possible. Attendance will be confirmed on a rolling basis until capacity is reached. There is no fixed registration deadline, but space is limited.
Once capacity is reached, the registration form will be closed.
As noted above: there are no registration fees, no remote participation or presentation options, and no formal proceedings. However, there will be ample time for interaction and discussion.
